SPICE-Precise Simulator Handles Flat And Hierarchical Designs November 2001 Issue Published Date: November 01, 2001
Said to represent the first commercially available sign-off simulator to provide simulation of one billion transistor memory circuits and provide full-chip capacity for memory, logic and mixed signal designs, UltraSim is designed to eliminate the need to use multiple simulators and other tools. This SPICE-precise simulator handles large flat and hierarchical designs and includes built-in reliability simulation. Its run times match or exceed by orders of magnitude known alternatives with near-SPICE accuracy. Other features of the simulator include both pre- and post layout capabilities, the ability to recognize HSPICE format netlists, and support for SPICE BSIM3, CMOS and GP BJT models, HVMOS models, and hot carrier injection models compatible with BTABERT. Beta versions for Solaris and Windows NT are shipping now and production versions and a HP-UX version are expected this quarter. Prices start at $50,000. For further information, contact CELESTRY DESIGN TECHNOLOGIES INC., San Jose, CA. (408) 451-1210.
