65-nm Process Permits Highly Integrated Satellite TV SoC December 07, 2007
The BCM7325 next-generation, high-definition satellite set-top box system-on-a-chip integrates a single tuner/demodulator from the BCM4506 front-end device and the latest generation of AVC decoder, which supports multiple video formats. The BCM7325 supports worldwide standards for DBS transmission systems based on DVB-S2, 8PSK, and Turbo Code, and is backward-compatible with the DVB-S standard. The chip operates on a dual-threaded MIPS CPU core running at 333 MHz, resulting in over 550 DMIPS of performance. Designed to support UMA and non-UMA memory architectures, the device allows cost-effective memory implementations. It uses a 400-MHz clock and a 32-bit wide DDR2 memory I/F for enhanced performance. Support is provided for several interfaces for TV output, including HDMI, baseband composite, component, or S-Video. Also incorporated onboard is the company’s advanced 2D graphics engine, which enables true studio-quality text and graphics, efficiently using its memory and bandwidth. The system is designed in a 65-nm process, which reduces power and size while increasing integration levels. The BCM7325 satellite receiver SoC is sampling to early-access customers. Pricing is available on request for manufacturers of satellite TV set-top boxes. Also available to early access customers is a fully supported reference design (BCM97325) that ensures cost-efficient design and manufacturing, and faster time-to-market. The BCM97325 is a development platform for set-top box design based on the BCM7325 and is available with complete software source code, schematics, and Gerber files. It provides detailed design information for manufacturers of interactive cable TV set-top box terminals. BROADCOM CORP., Irvine, CA. (949) 926-5000.
