Mini Twin Transistor Shrinks VCO Designs January 12, 2009
For shrinking VCO designs, the UPA828TD twin transistor combines two closely matched silicon NPN chips in a six-pin, leadless RoHS-compliant package measuring 1.2 mm x 1 mm x 0.5 mm. The device enables the combination of oscillator and buffer amplifier functions in one package. Typical specifications at 1V, 3 mA, and 2 GHz include a noise figure of 1.3 dB, an insertion power gain of 7.5 dB, and an operating frequency to 9 GHz. Each transistor is independently mounted, therefore the device is configurable for either cascode or dual transistor operation. Price is $0.06 each/10,000. CALIFORNIA EASTERN LABORATORIES, Santa Clara, CA. (408) 988-3500.
